1. Field of the Invention
The present invention relates to an error correction encoding method, an error correction decoding method, and devices therefor, which are used in a digital transmission system, for example.
2. Description of the Related Art
For example, in a conventional error correction encoding method for optical communications (see Japanese Patent No. 4382124), as illustrated in FIGS. 2, 5, 6, and 7 of Japanese Patent No. 4382124, a function of carrying out interleaving between outer code and inner code is implemented through an operation of performing a bit shift on a column basis. In this case, the interleaving operation may be performed through parallel processing of 128 lines per column with respect to an optical channel transport unit-k (OTUk) frame (k is classified into four categories of 1, 2, 3, and 4, depending on the transmission speed), which is compliant with ITU-T Recommendation G.709 (see ITU-T Recommendation G.709). In this case, allocation ratios between an information sequence area and a parity sequence area, which are provided in each of four inner frames (here, referred to as forward error correction (FEC) frames), are uniform among all the 128 lines.
Due to the fact that the conventional error correction encoding method and devices therefor are configured as described above, in a case of performing parallel processing of 512 lines per column and adopting an OTUkV frame described in Appendix of ITU-T Recommendation G.709 (a parity sequence length is lengthened compared to the OTUk frame), the parity sequence length of each inner frame needs to be divisible by 512. When this condition is not satisfied, the allocation ratios between the information sequence area and the parity sequence area become non-uniform among the lines, and hence distribution in a codeword sequence arranged in a lateral direction becomes non-uniform.
As described above, the conventional error correction encoding method and the devices therefor have a problem in that a constraint is imposed on the parity sequence length. In other words, there is a problem in that a constraint is imposed on a frame structure for improving, through an increased parallel number for processing, a processing throughput and for enhancing an error correction capability.